Digital sine/cosine generator

ABSTRACT

In a sine/cosine generator the angular value written into an angle register, is directly supplied to a memory (ROM), if either the sine of an angle located in the first or third quadrant, or the cosine of an angle in the second or fourth quadrant must be determined. The value is supplied in inverted form to the memory, if either the sine of an angle located in the second or fourth quadrant, or the cosine of an angle located in the first or third quadrant must be determined. The memory contains the sine values of a discrete number of angular values to be offered by the angle register. Furthermore, the sine/cosine generator comprises various logic circuits to minimize the memory capacity to be used, and to place the sine and cosine values, obtained by the memory and provided with a sign bit, in a register which is part of an output circuit.

Elnited States Patent 1191 sin(req) cos(req) LeComte 5] May 22, 1973[54] DIGITAL SINE/COSINE GENERATOR 3,624,636 11/1971 Diederich ..235 197x [75] Inventor: Corstiaan LeComte, Hiizen, Netherlands PrimaryExaminer-Joseph F. Rugglero Attorney-Frank R. Trifari [73] Assignee:N.V. Hollandse Signaalapparaten,

Hengelo, Netherlands 57 ABSTRACT [22] Filed: 1971 In a sine/cosinegenerator the angular value written [21] A 1 N 139,211 into an angleregister, is directly supplied to a memory (ROM), if either the sine ofan angle located in the first or third uadrant, or the cosine of an anle in the [30] Fore'gn Apphafion Pnonty Data second or foi irth quadrantmust be determir ied. The Oct. 19, 1970 Netherlands ..70l5266 value issupplied in inverted form to the memory, if either the sine of an anglelocated in the second or [52] US. Cl. ..235/ 197, 235/152, 235/186fourth quadrant, or the cosine of an angle located in [51] Int. Cl...G06f 15/34, G06g 7/22 the first or third quadrant must be determined.The [58] Field of Search ..235/l97, 150.53, memory contains the sinevalues of a discrete number 23 /152, 18 07/229; 323/1 1 of angularvalues to be offered by the angle register. Furthermore, the sine/cosinegenerator comprises References Cited various logic circuits to minimizethe memory capacity UNITED STATES PATENTS to used, and to place the sineand cosine values, obtalned by the memory and provided w1th a slgn b1t,3,529,138 9/1970 Andre et a1 ..235/l97 X in a register which is part ofan output circuit. 3,569,684 3/l97l Burnett ..235/l52 3,596,076 7/1971Zimmerman ..235/l97 9 Claims, 5 Drawing figures ANGLE I EGISTER CONTROLUNIT INVERSION CIRCUIT 2 l OUTPUT CIRCUIT E1 s 1 REGISTER/ 1 6 PATENTEUW 2 75 SHEET 1 UF 4 um cmw $5 6 Eam m INVENTOR CORSTIAAN LE COMTE Ma p 'AGE JOEZOQ mwkm m. oz GE S GE PATENTED HY22l973 3 T35,1 1U

SHEET 2 OF 4 1 REGISTER 1 T UNIT CONTROL [lllllllll lT AND OUTPUTZIRCUIT REGISTER""IL INVENTOR PATENTEU P1221973 3.735.110

SHEET 3 [1F 4 [MEMORY I LOGIC c|Rcu|T- AND F 7 I 1 {E r LADDER i l 1 l li 1 1 1 6 1 Lfl REGISTER INVENTOR CORSTIAAN LE 'COMTE AGENT PATENTEU 3,735, l 10 sum u 0P4 INVERSION CIRCUIT LOGIC Cl RCU IT l ,7 V ,7 REGISTERINVENTOR CORS'IIAAN LE COMTE AGENT 1 DIGITAL SINE/COSINE GENERATOR Theinvention relates to a digital sine/cosine generator provided with anangle register, and a memory containing in digital form, the sine valuesof a discrete number of angular values to be offered by said register.

Digital sine/cosine generators which make use of read-only memories(ROMs), i.e. memories containing fixed values of definite magnitudes,are known. In such known sine/cosine generators, both a sine and acosine value are available in the memory for each angular value offeredby the angle register. If, for example, the angular value is offered inm bits, 2" sine and cosine values correspond with them; if eachtrigonometrical value is expressed in k bits, the memory should have atotal capacity of (2)2"(k) bits. In view of the fact that each use ofmemory capacity is expensive, it is advantageous to minimize this usewithout reducing, however, the accuracy of the desired (trigonometrical)values.

It is therefore the object of the invention to provide such anembodiment of the sine/cosine generator, wherein the memory capacity canbe used to greater advantage while retaining the same accuracy.According to the invention, the digital sine/cosine generator containsfor this purpose a control unit, to which are supplied in the firstinstance, the contents of that part of the angle register in which thetwo most significant bits are stored, and to which in the secondinstance, signals are supplied indicating whether the sine or the cosineof the angular value contained in said register should be determined.The control unit ensures that the contents of the angle registerdecreased by the two most significant bits, are supplied directly to themem ory by use of switching means, when either the sine of an anglelocated in the first or third quadrant, or the cosine of an angle in thesecond or fourth quadrant must be determined. These contents aresupplied in inverted form to said memory, or when either the sine of anangle located in the second or fourth quadrant, or the cosine of anangle located in the first or third quadrant must be determined. Thesine/cosine generator further comprises an output circuit whichcomprises a register which is controlled by a signal supplied by thecontrol unit. A sine value is placed therein together with a sign bitsupplied by the memory, corresponding to said sine or cosine value,respectively.

Such an embodiment makes it possible, if the angular value is offered inin bits and the desired trigonometrical value is expressed in k bits, tolimit the total required memory capacity at any rate to 2'" (k) bits.Splitting-up of the memory into two part memories makes it possible, inconjunction with a favorable design of the output circuit, to limit therequired memory capacity to 2" (k+6) bits.

The invention and its advantages will now be further explained withreference to the figures, of which:

FIG. 1 shows a block diagram of the digital sine/cosine generatoraccording to the invention;

FIG. 2 shows an embodiment of the control unit;

FIG. 3 shows in detail a possible embodiment of the digital sine/cosinegenerator, while FIGS. 4 and 5 show two embodiments of the outputcircuit in conjunction with the memories used.

Like parts in the figures are denoted by like numerals.

In the block diagram of the digital sine/cosine generator shown in FIG.1 the angle register is denoted by l and the memory by 2. The choice ofthe number of bits in which the angular value is offered to the memoryis determined by the accuracy required with respect to the angular valueoffered. In the embodiment under consideration 13 bits have been chosen,the most significant of which is the 180 bit and the least significantthe 8-bit with 8 180 (2 0.8 mils.

The memory 2 now contains in digital form the sine values of a discretenumber of angular values to be offered by register 1; these sine valuesare expressed in the embodiment here considered in 10 bits of which themost significant corresponds to sin 30 A and the least significantcorresponds to 2" According to the invention the digital sine/cosinegenerator comprises a control unit 3. In the first instance, it is fedwith the contents of that part of the angle register, which contains thetwo most significant bits, the 180 and bits, and in the second instanceit is supplied with signals which indicate whether the sine or thecosine of the angular value contained in register 1 should bedetermined. The latter signals have been denoted by sin(req) orcos(req). According to the invention, control unit 3 ensures, usingswitching means available for this purpose, that the contents of angleregister 1 decreased by the two most significant bits are fed direct tomemory 2, if either the sine of an angle located in the first or thirdquadrant, or the cosine located in an angle in the second or fourthquadrant should be determined. These bits are fed in inverted form tosaid memory if either the 'sine of an angle located in the second orfourth quadrant or the cosine of an angle located in the first or thirdquadrant should be determined. According to the invention, thesine/cosine generator further comprises an output circuit 5 whichcomprises at least a register 6 containing a sine value. This memoryprovides this value together with a sign bit, which corresponds toa'desiredsine or cosine value. The memory is under the control of asignal supplied by the control unit.

As the and the 90 bit are fed to control unit 3, the angle register 1can only offer angular values to the memory smaller than 90. The angularvalues which are or are not supplied directly to the memory can berepresented in magnitude by 0, 8, 28, 38, 90 8. In so far as an angle d:is located in the first quadrant, the whole angular value written inregister 1 is offered to the memory. However, if an angle (b is locatedin the second quadrant the memory is only offered an angular value qb90. It also holds, that if an angle (b is located in the third or fourthquadrant, an angular value (b 180 or d: 270, is offered to the memory.

If the sine of an angle (1) located in the first quadrant should bedetermined, the angular value as a whole, ex-

pressed in 11 bits, is offered directly to the memory. The memory thendirectly supplies the value of sin (I), expressed in 10 bits.

If the cosine of an angle located in the first quadrant should bedetermined, the angular value 90 (1) should be offered to the memory;for only then, the memory supplies the value sin(90 cos 1). The angularvalue 90 d) is obtained from the angular value by inversion of thelatter angular value. As an example the diagram below shows theinversion of an angle 4) 30.

180 90 45 26 a bit bit bit bit bit The inversion is performed by meansof the inversion circuit denoted by 7 in FIG. 1. This inversion circuitconsists of 11 inverters (one for each bit). It will, however, be clearthat the angle register can be designed in such a way that the elementsconstituting this register may supply an output signal both in thenormal and in the inverted form. In such a case the inverters arealready included in the angle register.

If the sine of an angle 4 located in the second quadrant should bedetermined, the angular value 4) 90 must be offered to the memory ininverted form; consequently, the angular value 90 12 90) 180 q} isoffered. The memory then supplies the value sin(l80 4;) sin d).

If the cosine of an angle (1; located in the second quadrant should bedetermined, the angular value (1: 90 is offered direct to the memory.The memory then supplies the value sin( 90) cos (b. When this value isplaced in register 6, the cos (b value is provided with the correct signby means of a signal supplied by control unit 3 via line 8.

If the sine of an angle 4) located in the third quadrant should bedetermined, the angular value 4: 180 is offered directly to the memory.This memory then supplies the value sin( 180) sin 4:. This value isprovided with the correct sign when it is placed in register 6.

If the cosine of an angle 4: located in the third quadrant should bedetermined, the angular value dz 180 is offered to the memory in aninverted form; thus the following value is offered: 90 (dz 180) 270 4).The memory then supplies the value sin(270" 4:) cos dz. This value isprovided with the correct sign when it is placed in register 6.

If the sine of an angle 6 located in the fourth quad- 4 and 90 or 180,indicate respectively, that the 90 bit or the 180 bit is low. The sin orcos, respectively, in-

rant should be determined, the angular value d) 270 should be offered tothe memory in an inverted form; thus the following value is offered: 90(d: 270") 360 Then the memory supplies sin(360 (b) sin (b. This value isprovided with the correct sign when it is placed in register 6.

If the cosine of an angle (I) located in the fourth quadrant should bedetermined, the angular value 270 is offered directly to the memory. Thememory then supplies the value sin( 270) cos (b.

Summarizing it may be said, that the angular value available in register1 minus the 90 and 180 bits, is fed direct to the memory, if the sine ofan angle located in the first or third quadrant should be determined orthe cosine of an angle located in the second or fourth quadrant. Thecondition for this direct transfer can be expressed as follows:

or after simplification by:

Wmn (90)cos In these expressions 90 or 180, respectively, indicate thatthe 90-bit or the l80 bit, respectively, is high dicate that the signalssin(req), 0r cos(req) are available.

It may further be said that the angular value available in register 1minus the 90 and the l bits is offered in an inverted form to thememory, if the sine of an angle located in the second or fourth quadrantshould be determined, or the cosine of an angle is located in the firstor third quadrant. The condition for this transfer in an inverted formmay be expressed as follows:

or after simplification by:

() sin l-(W) cos.

The signals representing the two derived conditions are generated incontrol unit 3 and function as control signals for the switching means4.

If the above inversion process is considered more closely, an angularvalue d: after inversion does not appear to give the angular value 90e5, but the value 90 8. Therefore, an error corresponding with the leastsignificant bit of the angular value offered is introduced. If, forexample, the 4 22.5 value is stored in the angle register and if thesine and the cosine of this angular value are successively desired, thememory will supply the sin 22.5 value or cos(22.5 8) value,respectively. The error here described can be corrected by storing inthe memory not the sine values of 0, '0, 26,

90 8, but the sine values of 558, 3/26 90 &8 If now, successively, thesine or cosine of angular value 45 22.5 is desired, the memory suppliesthe values sin(22.5 128) or cos(22.5 5&8), respectively. It may be notedthat sin $8 is indicated by 00000.00000 and cos 758 by 1 l l 11.11 1l 1. By applying the above artifice, the correct complement of anangular value offered has been obtained by a single inver- S1011.

FIG. 2 shows a possible embodiment of control unit 3. In this unit thetwo signals are generated which function as control signals for theswitching means 4 denoted in FIG. 1. As mentioned before, these controlsignals represent the following conditions:

(90 sin (90) cos and (90) sin (W) cos.

The first condition is realized by means of the NAN D elements 9, l0 and11 which elements have been connected in the way indicated in FIG. 2.After having been fed with signals 90, 90, sin(req) and cos(req), all ofthe NAND elements 9, 10 and 11 supply a signal indicating that anangular value offered by the angle register should be supplied directlyto the memory.

The second condition is realized by means of the NAND elements 12, 13and 14 which have been connected as shown in FIG. 2. After having beensupplied with signals 90, 9 sin(req) and cos(req), all of the NANDelements I2, 13 and 14 give a signal indicating that the angular valueoffered by the angle register should be fed to the memory only afterinversion.

Further, in control unit 3, a signal is generated which is fed ascontrol signal to the output circuit. This control signal represents thecondition:

This condition is realized by means of the NAND elements 15, 16, 17, 18and 19 which have been connected as shown in FIG. 2. A fter having beensupplied with signals 90, 90, 180, 180, sin(reg) and cos(req), all ofthe NAND elements through 19 give a signal by means of which the desiredsine or cosine is provided with the correct sign. Said control signal islow, if the sine or cosine is positive and high if the sine or cosine isnegative. Finally, control unit 3 comprises two delay circuits 20 and 21to which signals sin(req) or cos(req), respectively, are fed, and whoseoutput signals identify the trigonometrical value supplied by the outputcircuit as being the sine or cosine of the angular value written inregister 1. These two signals are denoted by sin(reply) or cos(reply).

FIG. 3 shows a possible embodiment of the digital sine/cosine generatorin detail,

The switching means 4 consist here of two multiple AND gates 22 and 23,respectively, and a multiple OR gate 24. The contents of the angleregister 1 decreased by the 90 and the 180 bit, are fed directly to thememory via multipl AND gate 22 and multiple OR gate 24, if condition(90) sin +(90) cos has been met. On the other hand the contents of theangle register decreased by the two most significant bits are fed, viamultiple AND gate 23 and multiple OR gate 24 in ir1v e rted form to thememory, if condition (90) sin 90) cos has been met. It may be noted thatthe angle register is built up of bistable elements and can supply,therefore, both the angular value and the inverted angular value.

In the embodiment shown in FIG. 3 register 6 is constituted by aparallel adder of which the number of ele-' ments correspond to thenumber of bits of which the trigonometrical value supplied by the memoryis composed, and increased by a sign bit. Apart from the register 6already mentioned, output circuit 5 comprises a circuit in which thetrigonometrical values coming from the memory are expressed in the twoscomplement system. This circuit is constituted by inversion circuit 25,multiple AND gates 26 and 27, multiple OR gate 28 and NAND element 29.

The trigonometrical value coming from the memory is written intoregister 6' via multiple AND gate 27 and multiple OR gate 28, if via theNAND element 29, the signal derived from the control unit 3 indicatesthat the said trigonometrical value is positive. This enables multipleAND gate 27.

On the other hand, the trigonometrical value coming from the memory iswritten into register 6 after inversion, via multiple AND gate 26 andmultiple OR gate 28, if the signal coming from control unit 3 indicatingthat the trigonometrical value desired is negative, enables multiple ANDgate 26.

The signal already mentioned coming from control unit 3 and indicatingwhether the trigonometrical value desired is positive or negative iswritten into the 11th element of register 6. If the value desired ispositive a 0 is written in, if it is negative a l is written in.

A difficulty may arise, if a certain trigonometrical value assumes the 0value, for example, sin 180. In this case the memory supplies the sin.68 value, in binary notation 00000.00000. This sine is considerednegative by the control unit, so that in register 6, the inverse of thesin 1% value is written in binary notation:

1.1l1ll.1llll, of which the most significant bit indicates the sign.However, sin 180 should assume the value 0 and in the twos complementsystem, this can only be done by 00000000000. The value written intoregister 6 is, therefore, increased by 00000000001, in case the requiredtrigonometrical value is negative. For this purpose the signal comingfrom the control unit indicating whether the desired trigonometricalvalue is positive or negative is fed via line 30 to the leastsignificant element of register 6.

If by way of example, sin(30), or sin(2l0), respectively, is asked for,the 30 value is offered to the memory in both cases, and therefore, thememory supplies the sin(30 &8) in binary notation: 1.00000.00000. If thesin(30) value (a positive sine value) is asked for, the 01000000000value is written into register 6. If, on the other hand, the sin(2l0)value (a negative sine value) is asked for, the value 1.011 11.1 1 1 1 1is written into register 6 and 00000000001 is added to it, so that thesin(2l0) in binary notation is denoted by 1.10000.00000. It also appearsthat, apart from the sign, the sin(30) and sin(2l0) values are eachothers twos complement, for 10000.00000 increased by 10000.00000 gives10000000000.

FIG. 4 shows a modified detailed version of output circuit 5 inconjunction with the memory 2. In this memory the sine values, arecalculated in 10 bits, but only the nine least significant bits arereally stored in the memory. In other words, the most significant bit ofa desired trigonometrical value is not determined by the memory. Theconsequence of this procedure, is a decrease of the usable memorycapacity. In the ernbodiment shown in FIG. 3 it was 2 x10, but in theembodiment described here the memory capacity has been decreased to 2 9.

For the purpose of determining the most significant bit of atrigonometrical value desired, the output circuit 5 is provided with alogic circuit 31. Similar to the output circuit 5 of FIG. 3, the outputcircuit of FIG. 4, further comprises the register 6 designed as aparallel adder, the inversion circuit 32, the multiple AND gates 33 and34, the multiple OR gate 35 and the NAND element 36.

The value coming from the memory as expressed in nine bits, is writteninto the first elements of register 6. This is accomplished identicallyto the manner described with reference to FIG. 3, via multiple AND gate34 and multiple OR gate 35. If accomplished via NAND element 36, thesignal coming from the control unit indicates that the desiredtrigonometrical value is positive, and enables multiple AND gate 34. Onthe other hand, the value derived from the memory after inversion iswritten into the first nine elements of register 6 via multiple AND gate33 and multiple OR gate 35, if the signal coming from the control unitindicates that the desired trigonometrical value is negative.

Circuit 31 is used to determine the contents of the 10th element ofregister 6. For this purpose, the circuit is built up of NAND elements37 to 41, AND gates 42, 43 and 44 and OR gate 45. These elements andgates are connected as shown in FIG. 4.

The following signals are fed to circuit 31:

Xcos), derived from th e angle register. This signal which representsthe 45 bit at the input of the. memory, is the abbreviated destination:45*;

the signal 22.5 (90 sin +90Xcos) 22.5X (90 sin 90Xcos), also derivedfrom the angle register. This signal which represents the 22.5 bit atthe input of the memory is abbreviated by: 22.5*;

the most significant bit of the values supplied by the memory 2; thissignal is represented by: x k of the weight of the said 10th bit).

If the desired trigonometrical value is positive, the

signal represented by OR gate 45 is This condition implies that if theangular value offered to the memory is da 22.5, y assumes the valveirrespective of x. If dz 2 45, y assumes the 1 value again irrespectiveof x. For the case that 22.5 S d 45 the above condition is simplified toy=i Now we should distinguish between 22.5 S 30 and 30 q 45. In theformer case, the value of the most significant bit of the value suppliedby memory 2 is 1 in the latter case 0; the value for y is 0 then or 1,respectively. Summarizing it can be said that the contents of the th bitof register 6 in case (I: 30 are indicated byy=0, and if30s byy= I.

If the desired trigonometrical value is negative, the signal indicatedby OR gate 45 is represented by:

This condition implies that if the angular value offered to the memoryis 22.5, y assumes the value 1 irrespective of x. If (I) 2 45, y assumesthe value 0 again irrespective of x. For the case that 22.5 5 (b 45 theabove condition is simplified to y x. Now we should distinguish between22.5 5 d) 30 and 30 5 d 45. In the former case, the value of the mostsignificant bit of the value supplied by memory 2 is 0, in the lattercase, 1. In that case y is l or 0, respectively. Summarizing it can besaid that the contents of the 10th bit of register 6 in case 30 areindicated by y 1 and if 30 (b by y=0.

By way of example we consider again sin(30) or sin(2 10), respectively.In both cases the angular value offered to the memory in binary notionis:

The 45 and 22.5 signals supplied to logic circuit 31 are both 1. In casesin(30) should be determined, the condition represented by circuit 31 issimplified to y x, and in case sin(2l0) should be determined, to y 1.Although in the original determination of the memory contents, the valuesin(30 &8) is expressed in binary notion by: 10000.00000, the value0000.00000 is available in the memory, and is consequently readout. Thisshows that x 0, so that y l in determining sin(30), and y 0, indetermining sin(2l0). If the sin( 30) value is desired the value:

I (sign bit) 0 Illl.lllll (IOthbit) is written into the register.

l 1 (Sign bit) (10th bit) FIG. 5, shows a second detailed embodiment ofthe output circuit used in conjunction with memory 2.

The memory 2, consists of a first part memory 46, and a second partmemory 47. Of the angular value offered to the memory by the angleregister, the 9 most significant bits are fed to the part memory 46,namely the 45 bit, 22.5 bit, 46 bit. This part memory contains the 2sine values which can be expressed in magnitude by: sin We sin (9/28 sin(17/2) 8, etc. Although the trigonometrical values desired must beexpressed in 10 bits, they are calculated in nine bits for the sake ofstoring them in part memory 46. The part memory 46 supplies the coarsesine values. Of these sine values originally calculated in nine bits,only eight bits are actually stored in the part memory. Analogous to thedescription with reference to FIG. 4, the most significant bit of thetrigonometrical value desired is not determined by the memory here butby logic circuit 31. The memory capacity used by part memory 46 can beindicated now by 2 8bits. The whole angular value offered to the memoryby the angle register is fed to part memory 47. This part memorycontains 2 sine increment values expressed in two bits, which serve tocorrect the coarse sine values determined by means of part memory 46.The memory capacity used by part memory 47 can be indicated by 2X2 bits.The total capacity of memory 2 is now decreased, with respect to theembodiment shown in FIG. 4, to 2 X8 2" 2 2 bits.

Like the embodiments shown in FIGS. 3 and 4, the register 6 isconstituted by a parallel adder. Further, the output circuit comprisestwo circuits in which the values derived from the two part memoriesexpressed in the twos complement system, can be written into register 6.

The first of the two circuits in which the values supplies by partmemory 46 are written into register 6, is constituted by inversioncircuit 48, multiple AND gates 49 and 50, multiple OR gate 51 and NANDelement 52.

In case the trigonometrical value desired is positive, the multiple ANDgate 50 is enabled using the NAND element 52, and the value expressed ineight bits by part memory 46 is placed into the second to the ninthelement of register 6 via multiple AND gate 50 and multiple OR gate 51.In the first element of this register, a 0 is written. For this purpose,a ninth bit is added to the eight bits derived from the part memory. Theninth bit is also fed to register 6 via multiple AND gate 50 andmultiple OR gate 51.

In case the trigonometrical value desired is negative, the multiple ANDgate 49 is enabled, and the value expressed in eight bits by part memory46, is placed into the second to the ninth element of register 6, onlyafter inversion in circuit 48 via multiple AND gate 49 and multiple ORgate 51. In the first element of this register a l is written. For thispurpose the ninth bit is added to the eight bits in the part memory.This is also fed to reg- 9 ister 6 via multiple AND gate 49 and multipleOR gate 51.

As already noted, the contents of the 10th element of register 6 aredetermined by logic circuit 31 to which (in a way identical to FIG. 4),the 45, and the 22.5 signals are fed. Also fed thereto, is the mostsignificant bit of the value supplied by part memory 46 and thepreviously mentioned signal derived from the control unit.

The coarse trigonometrical value written in the above described way intoregister 6 is corrected by a sine increment value available in partmemory 47. Part memory 46 contains 2 512 coarse sine values; part memory47 contains 2 2048 sine increment values. Expressed in binary notion,they assume one of the values 00, 01, 10 or 1 1. Since the value doesnot entail any correction, a maximum of three corrected (fine) sinevalues can be obtained between two successive coarse sine values.

Apart from the first circuit already mentioned, for placing the valuesderived from part memory 46 into register 6, the output circuit alsocontains a second circuit to add the value supplied by part memory 47 tothe value (derived from part memory 46) already available in register 6.This is accomplished in such a way that the desired trigonometricalvalues are expressed in the twos complement system. This second circuitcomprises for this purpose an inversion circuit 53, multiple AND gates54 and 55, multiple OR gate 56 and a parallel adder 57 consisting ofthree elements.

In case the trigonometrical value desired is positive, the multiple ANDgate 55 is enabled using the NAND element 52 already mentioned, and thevalue expressed in bits by part memory 47 is placed into the 1st and 2ndelement of register 6 via multiple AND gate 55 and multiple OR gate 56.A 0 is added to the 3rd up to the 1 1th element of said register; forthis purpose a third bit is added to the two derived from the partmemory. The third bit is also fed to register 6 via multiple AND gate 55and multiple OR gate 56.

In case the trigonometrical value desired is negative, the multiple ANDgate 54 is enabled. However, not only the inverted value of the valuederived from part memory 47 is fed to register 6 via this gate, but thisvalue is also placed into the first and second element of a paralleladder 57. A third bit is added to the value derived from part memory 47,which assumes the constant value 1. This bit is placed in the thirdelement of the parallel adder 57. In the present case, in which thetrigonometrical value desired is negative, the contents of the paralleladder are also raised by 1. If the sine increment value supplied by partmemory 47 assumes the value 00, 01, l0 and 11, respectively, thecontents of the parallel adder 57 can be represented by 000, 111, l 10and 101, respectively. The first two bits of the value contained in theparallel adder 57'are fed to the first and second element of register 6via multiple AND gate 54 and multiple OR gate 56. The third bit of thevalue contained in the parallel adder 57 is fed via multiple AND gate 54and multiple OR gate 57 to the remaining elements of register 6, namelythe third to the 11th element. Consequently, the following sineincrement value is added to the, coarsely determined, trigonometricalvalue desired in register 6,in case this trigonometrical value isnegative:

l.lllll.llll0, or

l.l1l1l.l1l0l,

in other words: the least significant bit is 0, l, 2 or 3 times deductedfrom the coarsely determined trigonometrical value, or the absolutevalue of the coarsely determined trigonometrical value is raised by theleast significant bit 0, l, 2 or 3 times.

A second correction facility is created by a correction circuitconsisting of NAND element 58 and AND gates 59 and 61. The contents ofregister 6 e raised by 1 by these means, if the condition 8X28 45 ismet, and the desired trigonometrical value is negative. The contents ofthe parallel adder 57 is raised by 1, if the condition: 8X28 45* is met.These expressions: 6, 26 and 45, represent signals occurring at theinput of the memory derived from angle register 1 as aforementioned.

The sine values of successive angular values offered may differ, ifthese angular values are not too large (for example smaller than 45).Therefore, the sine increment values supplied by part memory 47 areinsufficient to apply the required corrections to the coarselydetermined trigonometrical values. The supplied increment values mayassume the values 00, 01, 10 or ll. Should the increment value 11 appearto be insufficient, it must possible to raise it to 100.

In case the desired trigonometrical value is positive, the abovementioned second correction is made if the angular value offered to thememory is d) 45, and further, 8= 1 and 28= 1. This is accomplished byraising'the contents of register 6 by 1 using AND gates 59 and 61. Itshould be noted, that AND gate 61 is enabled by a signal supplied vialine 62 indicating that the desiredtrigonometrical value is positive.

In case the desired trigonometrical value is negative, the abovementioned second correction is carried out by the omission of a raise byl of the parallel adder 57. If 45 or b 5 45, provided 8 and/or 28 9 l,the contents of the parallel adder are raised by 1. This action resultsin a correction to the coarsely determined trigonometrical value of +l0, l or 2 times the least significant bit.

If, for example, sin(2l0) is desired, 010101010 is ofiered to partmemory 46 and 0l0l0.l0l0l.0 is offered to part memory 47. Part memory 46supplies 00000000, and part memory 47 supplies 00. The coarselydetermined trigonometrical value in register 6 is then represented by:

1 0 (sign bit) 10m bit) If the part memory supplies 00 as a sineincrement value the following: +1 times the least significant bit,should be supplied to register 6 as correction, thus: 0 0 000000001. Thedesired sin(2l0) is consequently denoted by: 1. 1000000000. This resultcorresponds to the result found with reference to FIGS. 3 and 4.

What we claim is:

1. A digital sine/cosine generator, comprising an angle register and amemory which contains in digital form the'sine values of a discretenumber of angular values to be offered by said register, a control unitto which, in the first instance, are fed the contents of that signalsare supplied indicating whether the sine or the cosine of the angularvalue contained in said register should be determined, said control unithaving switching means for ensuring that the contents of the angleregister decreased by the two most significant bits are fed directly tothe memory, if either the sine of an angle located in the first or thirdquadrant, or the cosine of an angle located in the second or fourthquadrant must be determined, said contents being fed in an inverted formto said memory if either the sine of an angle located in the second orfourth quadrant, or the cosine of an angle located in the first or thirdquadrant should be determined, and an output circuit having at least aregister in which, under the control of a signal supplied by saidcontrol unit, provides a sine value supplied by said memory, with a signbit corresponding with said sine or cosine value, respectively.

2. A digital sine/cosine generator according to claim 1, wherein thememory contains 2'' sine values the magnitude of which can be denoted bysin(nl/2) 8 with n l, 2, 2, where m represents the number of bits fromwhich the total contents of the angle register are composed, and 8represents the angular value of the least significant bit.

3. A digital sine/cosine generator according to claim 1, wherein theregister in the output circuit comprises a parallel adder, said adderhaving a number of elements corresponding to a number of bits composedby the sine values supplied by the memory said elements increased by asign bit, and wherein the signal coming from the control unit andsupplied to the output circuit ensures that a sine value supplied by thememory is directly supplied to said adder, if said sine or cosine valueis positive, said value being supplied in an inverted form, if said sineor cosine is negative, whereby the above signal derived from the controlunit is also supplied to the parallel adder in order to increase thecontents of the adder by I.

4. A digital sine/cosine generator according; to claim 2, wherein ofeach of the sine values expressed in k bits only lc-l least significantbits are stored in the memory.

5. A digital sine/cosine generator according to claim 4, wherein theregister in the output circuit is formed by a parallel adder consistingof k+l elements, said generator comprising switching means for feedingthe signal coming from the control unit to the output circuit, saidswitching means ensuring that the number supplied by the memory, andconsisting of k-l bits, is directly fed to the first k-l elements of theadder, if said sine or cosine, respectively, is positive, and whereinsaid number is supplied in an inverted form, if said sine or cosine,respectively, is negative, said sine/- cosine generator furthercomprising a logic circuit for determining the contents of the kthelement of the parallel adder after the most significant bit supplied bythe memory has been supplied to it, and wherein a signal coming from thecontrol unit, functioning as a sign bit, determines the contents of the(k+l )th element of the parallel adder and is fed to said adder in orderto increase the contents of said adder by 1 in case the desired sine orcosine, respectively, is negative.

6. A digital sine/cosine generator according to claim 1, wherein thememory comprises a first and a second part memory whereby the first partmemory contains 2" sine values whose magnitude can be denoted by sin(4n7/2)8 with n l, 2, 2", where m represent the number of bits constitutingthe total contents of the angle register, and 8 the angular value of theleast significant bit, and whereby of each coarse sine value expressedin 10-1 bits, only the k-2 least significant bits are stored in thefirst part memory, and further wherein sine increment values, 2", arecontained in the second part memory and are expressed in 2 bits form asa refinement of the coarse sine values.

7. A digital sine/cosine generator according to claim 6, wherein theregister contained in the output circuit is constituted by a paralleladder consisting of k+l elements, whereby under the control of a signalsupplied by the control unit, a coarse sine value supplied by the firstpart memory is placed into the second to the (kl )th element of theadder, and a sine increment value supplied by the second part memory isfed to the first two elements of the adder and is added to the coarsesine value, the sine/cosine generator further comprising a logic circuitby means of which, after the most significant bit supplied by the firstpart memory and controlled by signals coming from the angle register andcontrol unit has been supplied to it, the contents of the kth element ofthe parallel adder are determined, and further wherein the signal comingfrom the control unit functions as a sign bit for determining thecontents of the (k+l )th element of the adder.

8. A digital sine/cosine generator according to claim 7, wherein thesignal coming from the control unit, using first switching meansavailable for this purpose in the output circuit, ensures that thenumber consisting of 10-2 bits supplied by the first part memory is feddirectly to the parallel adder if the desired sine or cosine,respectively, is positive, and the number is fed in an inverted form ifthe desired sine or cosine, respectively, is negative, whereby at thesame time either a 0 or a l is fed to the least significant element ofthe parallel adder, and added to the contents of said adder depending onwhether the desired sine or cosine, respectively, is positive ornegative.

9. A digital sine/cosine generator according to claim 7 wherein thesignal coming from the control unit ensures, using second switchingmeans available for this purpose in the output circuit, that the twobits supplied by the second part memory are directly fed to the paralleladder if said sine or cosine, respectively, is positive, and said bitsare fed in an inverted form if said sine or cosine, respectively, isnegative, and further wherein a correction circuit is available, whichfor the purpose of sine or cosine determination of small angular valuescorrects the increment values supplied by the second part memory.

7% I UNITED STATES PATENT mm;

CERTIFICATE OF CORRECTION Patent No. 31735410 A Dated May 221 1973Inventor(s) CORSTIAAN LeCOMTE It is certified that error appears in theabove-identified patent and that said Letters Patent are herebycorrected as shown below:

C olumn 2 line 9, (2 should read (2 a Column 5, lines 1-3 "180 x sin (90x 180 90 x 180) cos" should read l80 x sin (90 x 180 90 x 180) cos--Column 6, lines 64-65, "45 x (90 x sin 90 x cos) 45 x (90 x sin 90 xcos)" should read 1 5 x (56 x sin 90 x cos) x x sin 90 x cos)- Column 7,lines l-2, "22.5 x (90 x sin 90 x cos) 22.5 x (90 x sin 90 x cos)"should read 22.5 x (90 x sin 90 x cos) 22.5 x (90 x sin 90 x cos) I'Column 7, line 12, "y (x)22.5* (45 (x)22.5* 45*" should read y (x) 22.545 ()22 .5 45

Column 7, line 27, "y (E) 22.5 (45 (2)22 .5 45

should read, 22 .5*' (45") mg? UNITED STATES PATENT OFFICE CERTIFICATEOF CORRECTION Patent No. 3,735,110 Dated May 22, 1973 Inve ntor(s)CORSTIAAN LeCOMTE It is certified that error appears in theabove-identified patent and that said Letters Patent are herebycorrected as shown below:

| Column 7, line' 46, "The Z5 and 22 .5 1

should read, -The F and 22.5

Column 7, lines 48-49 "y x" should read n.

Column 9, line 5, "F, and the 22.5

should read, 45 and the 22.5*--

Column 10, line 18, x 2 x 45 should read 5x 2 5 x 45 Column 10, line I9,"45 "should read 5 Column 10, line 32, "a 45" should read a 3 45- Signedand sealed this 17th day of September 1974.

(SEAL) Attest:

McCOY M. GIBSON JR. (3\: MARSHALL DANN I Attesting Officer Commissionerof Patents L. I .J

1. A digital sine/cosine generator, comprising an angle register and amemory which contains in digital form the sine values of a discretenumber of angular values to be offered by said register, a control unitto which, in the first instance, are fed the contents of that part ofthe angle register in which two most significant bits are stored, and towhich, in the second instance, signals are supplied indicating whetherthe sine or the cosine of the angular value contained in said registershould be determined, said control unit having switching means forensuring that the contents of the angle register decreased by the twomost significant bits are fed directly to the memory, if either the sineof an angle located in the first or third quadrant, or the cosine of anangle located in the second or fourth quadrant must be determined, saidcontents being fed in an inverted form to said memory if either the sineof an angle located in the second or fourth quadrant, or the cosine ofan angle located in the first or third quadrant should be determined,and an output circuit having at least a register in which, under thecontrol of a signal supplied by said control unit, provides a sine valuesupplied by said memory, with a sign bit corresponding with said sine orcosine value, respectively.
 2. A digital sine/cosine generator accordingto claim 1, wherein the memory contains 2m 2 sine values the magnitudeof which can be denoted by sin(n-1/2) delta with n 1, 2, . . . , 2m 2,where m represents the number of bits from which the total contents ofthe angle register are composed, and delta represents the angular valueof the least significant bit.
 3. A digital sine/cosine generatoraccording to claim 1, wherein the register in the output circuitcomprises a parallel adder, said adder having a number of elementscorresponding to a number of bits composed by the sine values suppliedby the memory said elements increased by a sign bit, and wherein thesignal coming from the control unit and supplied to the output circuitensures that a sine value supplied by the memory is directly supplied tosaid adder, if said sine or cosine value is positive, said value beingsupplied in an inverted form, if said sine or cosine is negative,whereby the above signal derived from the control unit is also suppliedto the parallel adder in order to increase the contents of the adderby
 1. 4. A digital sine/cosine generator according to claim 2, whereinof each of the sine values expressed in k bits only k-1 leastsignificant bits are stored in the memory.
 5. A digital sine/cosinegenerator according to claim 4, wherein the register in the outputcircuit is formed by a parallel adder consisting of k+1 elements, saidgenerator comprising switching means for feeding the signal coming fromthe control unit to the output circuit, said switching means ensuringthat the number supplied by the memory, and consisting of k-1 bits, isdirectly fed to the first k-1 elements of the adder, if said sine orcosine, respectively, is positive, and wherein said number is suppliedin an inverted form, if said sine or cosine, respectively, is negative,said sine/cosine generator further comprising a logic circuit fordetermining the contents of the kth element of the parallel adder afterthe most significant bit supplied by the memory has been supplied to it,and wherein a signal coming from the control unit, functioning as a signbit, determines the contents of the (k+1)th element of the paralleladder and is fed to said adder in order to increase the contents of saidadder by 1 in case the desired sine or cosine, respectively, isnegative.
 6. A digital sine/cosine generator according to claim 1,wherein the memory comprises a first and a second part memory wherebythe first part memory contains 2m 4 sine values whose magnitude can bedenoted by sin(4n - 7/2) delta with n 1, 2, . . . , 2m 4, where mrepresent the number of bits constituting the total contents of theangle register, and delta the angular value of the least significantbit, and whereby of each coarse sine value expressed in k-1 bits, onlythe k-2 least significant bits are stored in the first part memory, andfurther wherein sine increment values, 2m 2, are contained in the secondpart memory and are expressed in 2 bits form as a refinement of thecoarse sine values.
 7. A digital sine/cosine generator according toclaim 6, wherein the register contained in the output circuit isconstituted by a parallel adder consisting of k+1 elements, wherebyunder the control of a signal supplied by the control unit, a coarsesine value supplied by the first part memory is placed into the secondto the (k-1)th element of the adder, and a sine increment value suppliedby the second part memory is fed to the first two elements of the adderand is added to the coarse sine value, the sine/cosine generator furthercomprising a logic circuit by means of which, after the most significantbit supplied by the first part memory and controlled by signals comingfrom the angle register and control unit has been supplied to it, thecontents of the kth element of the parallel adder are determined, andfurther wherein the signal coming from the control unit functions as asign bit for determining the contents of the (k+1)th element of theadder.
 8. A digital sine/cosine generator according to claim 7, whereinthe signal coming from the control unit, using first switching meansavailable for this purpose in the output circuit, ensures that thenumber consisting of k-2 bits supplied by the first part memory is feddirectly to the parallel adder if the desired sine or cosine,respectively, is positive, and the number is fed in an inverted form ifthe desired sine or cosine, respectively, is negative, whereby at thesame time either a 0 or a 1 is fed to the least significant element ofthe parallel adder, and added to the contents of said adder depending onwhether the desired sine or cosine, respectively, is positive ornegative.
 9. A digital sine/cosine generator according to claim 7wherein the signal coming from the control unit ensures, using secondswitching meAns available for this purpose in the output circuit, thatthe two bits supplied by the second part memory are directly fed to theparallel adder if said sine or cosine, respectively, is positive, andsaid bits are fed in an inverted form if said sine or cosine,respectively, is negative, and further wherein a correction circuit isavailable, which for the purpose of sine or cosine determination ofsmall angular values corrects the increment values supplied by thesecond part memory.